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PCI 6602 register document needs clararification

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Hi,

 

I have a few questions regarding PCI 6602 register level programming document:

 

1. I am doing simple gated event counting (level gating, counting once). I basically arm, gate on, gate off, disarm, read the counter, and then arm again and the cycle goes on. Do I need to load the counter with LoadA or LoadB content between arm and gate on? From another document I found online, it seems that reloading happens automatically. But I tried in my code and it seemed that I needed to reload every time.

 

2. On page 87 and 88 of NI 660X Register-Level Programmer Manual. First of all, this covers PFI 0 to 39. So the table on Page 87 should end at 0x7A2, not 0x7A0, right? On page 88, A means PFI 0, 2, 4, 6, …, 38 and B means 1, 3, 5,…, 39? For PFI 0 to 7, if I configure them as output, I should be able to write to STC DIO output register to program them to be high or low, right?

 

3.  On page 38 of NI 660X Register-Level Programmer Manual, Chip Signature Register is 0x700. On page 39, its address is 0x73C. Which one is correct? What should the chip signature be?

 

4. If I set a counter's gate input as its gate pin, do I need to set the same pin as a PFI input line?

 

5. After soft_reset, what are the default values of all registers? all 0s?


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