Hi,
I want to visualize 8 MHz counter clock on one of digital input line. For this I generated 8 MHz clock using counter 0 which is default output on PFI 12 line. This PFI 12 i have connected to one of digital input line Port 0 line 0. At 1 MHz it is a regular 1s and 0s pattern, which is ok. But as I am increasing frequency i am observersing irregular 1 and 0 patterns. Why this behaviour? Shouldn't it be a regular pulse train?