My experimental situation employs pulsed laser micromachining. The laser is externally trriggered with TTL pulses, but sometimes pulses are not triggered because the external TTL trigger is not synchronized to the laser controller's internal clock signal. The missing pulses can be observed by focusing into a sensitive photoresist translated on a nanopositioning stage such that individual pulses are well-separated, and gaps between holes are readily apparent when pulses are skipped. Using internal triggering of the laser there are no gaps, so it is not a problem with the laser itself.
For my application I need to synchronize the fast (38 MHz) reference TTL signal from the laser and the external TTL trigger at a user-defined frequency from 0-250 kHz. The user-defined TTL signal is generated by the nanopostioning stage controller, which does not have an input for the TTL reference signal from the laser, so the signal synchronization must be handled separately.
I have already thoroughly searched the posts on the forum and example VIs for solutions and tried numerous approaches pursuant to those posts, but I cannot get the signals synchronized. I am running the most current LabVIEW 15 SP1 f1 and DAQmx 15.5 with a PCI-6602 as in the attached block diagram image, with an SB-68 connector block. RegA is the laser reference signal at 38 MHz (CTR1 GATE on PFI34), A3200 is the nanopositioning stage controller signal (0-250 kHz) generated only when machining and idle otherwise (CTR2 GATE on PFI30), and Pulse Out is the TTL signal output to be synchronized with the RegA clock (CTR0 OUT on PFI36). I have verified with the test panels in NI MAX that both counter inputs work on the correct PFI lines, and the retriggerable output also behaves properly. My test case is using a 10 kHz generated signal (50 microseconds low, 50 microseconds high, 50% duty cycle), but the actual working version will input the same user-defined frequency as the A3200.
I first constructed this synchronization VI several months ago. In that early version I wired the 80 MHZ timebase into the RegA's counter terminal instead of PFI9, and ran one photoresist test that had no gaps. Thinking that I had a working solution, I perhaps naively stopped there without conducting further tests. Since that time I have patched LabVIEW (f1) and updated DAQmx from 15.0 to 15.5, and tried to replace the PCI-6602 with a new PCIe-6320. However, the 6320 yields the same result.
From what I have read, using the RegA signal as the sample clock should allow the PCI-6602 output signal to synchronize to it. However, tests with the photoresist always show gaps, and it does not appear that having the RegA signal even connected makes any difference. I am at a loss as to why the synchronization is not working and would appreciate any advice.