two counters, large range frequency measurement in fpga

Hello NI-community,

I'm trying to implement the "Measure Time of Known Number of Cycles" in FPGA (for explanation see http://www.ni.com/white-paper/3619/en#toc3 ). I'm using the NI cRIO-9074 chassis and a 9401 DI/O module. The signal to measure is in a range of 1000 to 10000 Hz. I expect to get the most accurate results from the methode mentioned with two counters. 

I just found some usefull hints for doing this with a DAQ device. (https://decibel.ni.com/content/docs/DOC-11542 ).

How do I code the first counter? Am I right to look for ex. an rising edge, count n (= divisor) zero crossings switching the signal to pos during this period (= logic-high of the divided down signal), repeating that for the low-level and forward it to counter 2?

I would be very thankfull for some help.

Regards

Martin