Hello everyone,
I am trying to get 4 PWM output signals with a 25 kHz frequency from the NI-9203 using the FPGA-based CompactRIO NI-9045.
I was able to get an accurate PWM signal, but the moment I add other PWM signal generation loops for the 3 other outputs or blocks to read from analog pins or write to the digital output pins, the PWM signal always gives 50% for the duty cycle and different frequencies that never change.
The equivalent of 25 kHz is 1600 ticks (internal clock 40 MHz).
I tried putting them in different SubVIs and running all of them in a while loop (and without that), but it was no use.
The only loops that use a clock-related function (Loop Timer) are the PWM SubVIs (the attached screenshot refers to the PWM code).
Does anyone know more about this? How can I fix it?