I need to generate a repetitive cascade of short trigger pulses which go to 7 different hardware devices, each one connected to a different digital output (or PFI) pin on the PCIe-6321. Basically, a master trigger generates a clock signal with some period and duty cycle and each clock pulse is sent cyclically to the 7 output pins (i.e. first pulse to output 1, second pulse to output 2, ... 7th pulse to output 7, 8th pulse to output 1 and so on).
This can be conveniently done with the onboard counters for such a cascade of up to 4 devices, but if I need more than 4 trigger signals, I may have to use the digital outputs instead. The problem with that is that the sample clock for the digital output only goes up to 1MHz according to the spec, limiting the clock pulse width to >1µs, which is too long. The counters use the internal 100MHz clock and can create pulses with down to 20ns duration (2 clock cycles). Since I'm not outputting complex digital waveforms, digital output is probably not the best method for this anyway. Is there a way to maybe forward the master clock (using one counter) to 7 different PFI terminals but with some kind of modulo logic (+ offset) applied to it to let only every nth pulse through?
It's probably not too hard to implement this with some high-speed shift register or so (requiring only a single counter output from the card), but a solution without external circuits would be much preferable.