Hi,
This is my first consultation in this forum and I hope it is not the last!
My sutuation is this:
I generate three frequency-dependent signals, called in my case F0, F0_NOT and Ping_Rate.
- F0 and F0_NOT are a pulse train at a frequency Fx and a duty cycle of 40%.
- F0_NOT is delayed 50% of the Fx period.
- The third signal is a train of pulses that controls the previous ones and serves as a control for other instruments.
- The parameters that can be varied are the Fx Frequency, the number of pulses in F0 and F0_NOT and the frequency of Ping_rate.
To generate the signals I have a PXIe-1071 and a PXI-6602 module. I am using counters 0,2 and 4 for each signal.
The problem I face:
I generated this VI from the different examples I have found but I still have a long way to go to understand this of the counters. The three signals are generated well but the problem is that when I enter the loop the signals F0 and F0_NOT are only generated in the first start and from there only the Ping_Rate signal remains.
I expected that every time the Ping_Rate pulse was activated, the task of the other two signals would be executed.
The question I have, is that I am missing so that the F0 and F0_NOT signals are executed while the Pin_Rate signal is executing?
Thank you in advance for your valuable help.
Note: On the images, Yellow is F0, Pink is F0_NOT and Blues is Ping_Rate.